This invention relates to detection of single density encoded data, and more particularly to utilizing a phased lock loop circuit for data separating wherein the rate of data flow might be susceptible to substantial variations.
The subject invention is designed for efficient and easy data separation of a data signal from a storage medium such as a floppy disc. It is particularly adapted for separating "single density encoded" data, wherein a single data bit is encoded between successive clock pulses. This data scheme is a prevalent scheme for encoding data on floppy discs. While other arrangements have been utilized, such as schemes having the clocks and data condensed, and higher density encoding is possible, this arrangement presents a favorable compromise, or trade-off, of various system considerations. The single density encoding arrangement enables relatively simple circuitry for use in conjunction with the floppy disc. However, in the prior art this arrangement has been vulnerable to system performance variations, and in particular variations in the speed of the motor that drives the floppy disc. In short, if the motor drive of the floppy disc experiences speed changes, there are resulting time variations in the data flow from the floppy disc pickup, resulting time variations must be accounted for in the data separating circuitry. A typical conventional separator circuit comprises a series of monostable multivibrators which are sensitive to the timing of the received signals, and which require adjustment when and if there occur variations in the rate of data flow from the floppy disc pickup. Such prior art separator systems, because they are sensitive to the timing, make it difficult to achieve the degree of reliability that is required for the overall system.